Semiconductor devices, such as large scale integrated circuits (LSI), are manufactured via a plurality of processes, such as etching, chemical vapor deposition (CVD), and sputtering, performed with respect to a silicon substrate. These processes, such as etching, CVD, and sputtering, may use plasma as an energy supply source, that is, may be plasma etching, plasma CVD, and plasma sputtering.
When manufacturing a semiconductor device, plasma processes described above are effectively used along with recent miniaturization or multilayered-wiring of LSI. For example, when performing a plasma process for manufacturing a semiconductor device, such as a metal oxide semiconductor (MOS) transistor, plasma generated by various devices, such as parallel-plate type plasma, inductively-coupled plasma (ICP), or electron cyclotron resonance (ECR) plasma, may be used.
Here, when the plasma process is performed on a silicon substrate (wafer) by using each of the plasma, electric charges are accumulated in a gate oxide film (gate insulation film) or adjacent layer included in a MOS transistor, and thus the MOS transistor has plasma damage, such as a charge-up.
When the MOS transistor has plasma damage, threshold value voltage (Vth) shift deviation or reduced current driving capability is occurred, thereby deteriorating the quality of the semiconductor device. Plasma damage does not occur only in the MOS transistor, but also in other semiconductor devices, such as a charge-coupled device (CCD).
Also, Japanese Laid-Open Patent Publication No. hei 8-250482 discloses such plasma damage.
With respect to the plasma damage, it has been conventionally sought to reduce the plasma damage when manufacturing an LSI circuit by properly designing a circuit, for example, by changing a length of a wire connected to a gate of a transistor so as to reduce an area exposed to plasma, by installing a diode so as to discharge accumulated charges, or the like.
However, as a smaller gate area of a transistor and a thinner film are required according to the development of a technology for minutely processing an LSI circuit, the effect of plasma damage accompanied by accumulation of charges increases. Accordingly, it is difficult to reduce plasma damage just by designing a circuit.
Here, electron density distribution of the plasma generated by parallel-plate, ECR, or ICP is not uniform on a silicon substrate, and thus the amount of the electron density non-uniformity is very large when plasma supply is switched on or off and when a high frequency bias voltage is applied. It is assumed that the plasma damage increases because more charges accumulate on the silicon substrate when a process using plasma having non-uniform electron density distribution is performed.